ZX80 porting of Super Micro Chess 1K

Any discussions related to the creation of new hardware or software for the ZX80 or ZX81
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marste
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ZX80 porting of Super Micro Chess 1K

Post by marste » Tue Mar 14, 2017 6:40 pm

I've been asked to port SuperMicro to the ZX80.

Having a look on it seems that the differences are not many:
1. sysvar allocation -> I'll reallocate things accordingly
2. system call differences -> I'll not reuse them so no problem
3. just fast mode available -> here a difference to be managed (see below)

Are they all?

Regarding #3:

The "slow" part of my program is the user input of the move. Almost no computation there and I can surely fit what is needed in the vertical retrace in order to display the screen to the user while moving.

Having a look on this interesting Paul Farrow disassembling http://www.fruitcake.plus.com/Sinclair/ ... sembly.asm seems that the way to go is:

Code: Select all

loop:

LD (IY+$23),$38
IN A,($FE)  ; Turn on the vertical sync generator

... do actions here (readkeyboard and move cursor) for around 1200 T-States (6.5 scan lines) ...

OUT ($FE),A ; Turn off the vertical sync generator

; Generate the top TV border + main area.
LD A,$EC
LD B,$19
LD HL,mydisplayfile + 1000000000000000b
CALL $01AD

; Generate the bottom TV border.
LD A,$F0
INC B
DEC HL
DEC (IY+$23)
CALL $01AD

JR loop
Correct?

PS: which is the best emulator to test if it's not flickering? (I'm also open to be gifted a real one! ;))

Thank you!

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marste
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Re: ZX80 porting of Super Micro Chess 1K

Post by marste » Wed Mar 15, 2017 8:29 am

Yesterday evening I thought about two more probable differences:
4. basic tokens
5. floating point absence

Both used in my case just to start the program (RAND USR fpnumber)

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Paul
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Re: ZX80 porting of Super Micro Chess 1K

Post by Paul » Wed Mar 15, 2017 9:48 am

In theory, there is no difference between theory and practice. But, in practice, there is.

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marste
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Re: ZX80 porting of Super Micro Chess 1K

Post by marste » Wed Mar 15, 2017 5:57 pm

Paul wrote:
Wed Mar 15, 2017 9:48 am
Maybe you should try this:
viewtopic.php?f=7&t=347&p=2838&hilit=Harness#p2837
Being passionate about electronics I would say that this is even a better link to follow: http://searle.hostei.com/grant/zx80/zx80.html !!

Unfortunately I’m not that far in soldering, and my own ZX81 seems not working already without me putting hands on it!...

So emulation seems the way to go if possible…

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Re: ZX80 porting of Super Micro Chess 1K

Post by Fruitcake » Wed Mar 15, 2017 10:20 pm

A modification to the display routine you listed is to call $01B0 instead of $01AD. This has the benefit that the IY register then becomes free and can be used in your program so long as you don't return to BASIC or call ROM routines that use it (if you do then simply reset it back to $4000 beforehand).

You can run sections of your program during the VSync period but this must always take a fixed number of clock cycles in order to achieve a steady display. The actual number isn't that critical, but aiming for a duration of 6 scan lines keeps the video output similar to the standard ZX80 display.

You can also increase the VSync period to allow more time for processing within your program by reducing the number of border lines shown. You can reduce the number of border lines by up to 16 and still achieve a full visible picture. However, a longer VSync pulse might cause problems on some TVs (although I haven't encountered this). The number of lines in the top border needs to be a multiple of 8, but this restriction does not apply to the bottom border. To minimise the code below, the top and bottom borders could both use the value stored in MARGIN_TOP and then reduce the VSync duration by 1 line's duration.

Code: Select all

	IN   A,($FE)		; Read the region indicator.
	RLA
	RLA
	SBC  A,A		; $FF (50Hz) or $00 (60Hz).
	AND  $18		; $18 (50Hz) or $00 (60Hz).
	ADD  A,$20		; $38 (50Hz) or $20 (60Hz), i.e. 56 (50Hz) or 32 (60Hz).
	LD   (MARGIN_TOP),A	; Store the top border count.
	DEC  A
	LD   (MARGIN_BOTTOM),A	; Store the bottom border count.
	
LOOP:
	IN   A,($FE)
	
	; VSync delay of 6 scan lines

	OUT  ($FF),A

	LD   A,(MARGIN_TOP)
	LD   C,A
	LD   A,$E8
	LD   B,$19		; B=1 'row' for top border of MARGIN_TOP lines, and 24 rows of 8 lines
	LD   HL,DFILE+$8000
	CALL $01B0
	
	LD   A,(MARGIN_BOTTOM)
	LD   C,A
	LD   A,$EB
	INC  B			; B=1 'row' for bottom border of MARGIN_BOTTOM lines
	RET  Z			; Delay 5 T-states to achieve perfect timing
	DEC  HL
	CALL $01B0

	JP   LOOP		; Loop back to generate the next frame.

MARGIN_TOP:
	DEFB $00
	
MARGIN_BOTTOM:
	DEFB $00
	
DFILE:
	DEFB $76
	... another 23 x $76 here ...
	DEFB $76
The EightyOne and No$zx81 emulators definitely handle the display routine above.

If you don't need the full display file then you can reduce the number of $76 in the DFILE, adjust the number of rows in LD B,$19 and compensate by increasing the number of border lines.

Regarding other differences between the ZX80 and ZX81, some graphic characters have different character codes.

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Re: ZX80 porting of Super Micro Chess 1K

Post by marste » Sat Mar 18, 2017 4:56 pm

The second option is nice with the compatibility pal/ntsc and the "adjustable" border, but even if I removed other 7 bytes in the listing below it is still 14 bytes bigger. This can be ok for many, but I've to see final result if push/pop iy and border will be worth the effort. Here the little optimized version:

Code: Select all

    IN   A,($FE)	; Read the region indicator.
	RLA
	RLA
	SBC  A,A		; $FF (50Hz) or $00 (60Hz).
	AND  $18		; $18 (50Hz) or $00 (60Hz).
	ADD  A,$20		; $38 (50Hz) or $20 (60Hz), i.e. 56 (50Hz) or 32 (60Hz).

	LD   (MARGIN_TOP),A	; Store the top border count.
	DEC  A
	LD   (MARGIN_BOTTOM),A ; Store the bottom border count.
	
LOOP:
	IN   A,($FE)
	
	; VSync delay of 6 scan lines

	OUT  ($FF),A

	LD   C,0
  MARGIN_TOP equ $-1
	LD   A,$E8
	LD   B,$19		; B=1 'row' for top border of MARGIN_TOP lines, and 24 rows of 8 lines
	LD   HL,dfile+$8000
	CALL $01B0
	
	LD   C,0
  MARGIN_BOTTOM equ $-1
	LD   A,$EB
	INC  B			; B=1 'row' for bottom border of MARGIN_BOTTOM lines
	RET  Z			; Delay 5 T-states to achieve perfect timing
	DEC  HL
	CALL $01B0

	JR   LOOP		; Loop back to generate the next frame.
Last edited by marste on Sat Mar 18, 2017 5:29 pm, edited 1 time in total.

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Re: ZX80 porting of Super Micro Chess 1K

Post by marste » Sat Mar 18, 2017 5:28 pm

Another difference I spot is the
6. different cassette format (starting at $4000 and not $4009) with
6a. no-autorun
6b. no display file
6c. different maximum lenght ?

Seems that Martin "nocash" has a trick for the autorun:
ZX80 Data Field
The data field is loaded to address 4000h, and it contains the whole system area, the basic program, and VARS area. Video memory is NOT included in ZX80 files.
The system area should contain proper data. The entry at 400Ah defines the end address (used to calculate the file length). Memory at 4028h and up may be misused for whatever purpose.
Normally, ZX80 files cannot be autostarted - except via "nocash LD H,L trick":
;nocash LD H,L trick for autostarting ZX80 files, 9/2009 by martin korth
4000h 8 x 00h ;System area: Zerofilled stuff
4008h 402Ch ;System area: Pointer to VARS
400Ah nn3Dh ;System area: Pointer to End of file
400Ch 1Ch x 00h ;System area: Zerofilled stuff
4028h 00h,01h,65h,76h ;BASIC program: Line 0001, LD H,L opcode, NEWLINE
402Ch 80h ;VARS area: End code
402Dh 13h x 00h ;Unused/padding (for entryoint 4040h)
4040h ... ;Machine code (entrypoint at 4040h)
xxxxh (xx3Dh-$) x 00h ;Unused/padding (for end address xx3Dh)
xx3Dh ;End of file (must be at xx3Dh)
After loading, the BASIC line is LISTed on the screen. The ZX80 BIOS doesn't replace invalid tokens in range of 40h..7Fh by question marks, so Token 65h is written as-is to VRAM (ie. as LD H,L opcode). The file must end at xx3Dh, so the first character line starts at xx40h, which is (normally) excecuted 8 times via JP HL from inside of the IRQ handler. After first execution, the LD H,L opcode changes HL=xx40h to HL=4040h, so the next IRQ jumps to the autostart entryoint at 4040h. That is still done with IRQs enabled, so the first opcode at 4040h should be a DI.
Note: Emulators that do not handle opcodes in VRAM should reproduce autostart as "IF [402Ah]=7665h THEN JP 4040h" after loading the file (that, preferably with registers and memory initialized as on real hardware).
Hope with the trick will be retained also the display file, since my one is almost 150 bytes...

To be tested the maximum file lenght that for ZX81 standard file loader is 949 bytes (sysvars and display inlcuded).

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Re: ZX80 porting of Super Micro Chess 1K

Post by marste » Sat Mar 18, 2017 9:36 pm

I red thoroughly the Martin description and (apart the maximum lenght of $33d) unfortunately the screen is not kept and has to be rebuild. This means a complete rewrite of the initialization part, and a lot less space available than in the ZX81 version. Probably this means removing the logic handling first moves, but hope still to fit the rest. But will be a bit more time consuming than I thought.

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Re: ZX80 porting of Super Micro Chess 1K

Post by Moggy » Sat Mar 18, 2017 10:39 pm

I contacted Stefano a short time ago about porting this to the ZX80 would it be him that's asked you to do this port? Either way please persevere marste as quite a few of us would be grateful for your efforts,we have the original but poor game play 1k chess for the ZX80 so this much superior version would be very much appreciated as it would give the little white PC something more interesting to do other than another mastermind clone. :D

Best of luck with your efforts.

Regards.

Moggy.

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Re: ZX80 porting of Super Micro Chess 1K

Post by marste » Sat Mar 18, 2017 11:13 pm

@Moggy: I'm Stefano! :)

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