Hi all,
I'm interested to know wether it's possible to modify a +2 (grey) or spectrum 128 to get All-RAM?
I do have a +3 compatible disc interface and would like to try using it on my grey +2
I would be happy about your comments.
Kind regards Paul
Is it possible to add All-RAM to a +2?
Is it possible to add All-RAM to a +2?
In theory, there is no difference between theory and practice. But, in practice, there is.
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Re: Is it possible to add All-RAM to a +2?
The easiest way (and this applies to all 48K/+/128K/+2 grey models) is to use an expansion board with a SRAM chip that can be switched in to replace the 16K ROM. You will need some glue logic to map the bank switching flip-flop (register) to a suitable I/O address.
Some existing interfaces/expansions can already do some of this (DivIDE, DivMMC, ZXMMC, Spectranet and maybe others, although not all are able to provide true read/write RAM access across the whole ROM space).
If you want an internal modification, then either piggyback the SRAM chip on the ROM chip, or use a PCB to grab the necessary address and data lines from the Z80 socket. You will still need the glue logic.
In theory, for the 128K and +2 grey, you could also use the existing DRAM. But that may require modifications to the board. As the address decoding is split between IC1 (ULA), IC27/IC10 (ZX8401/PCF1306P/40058) and IC29/IC7 (10H8 PAL).
In the 16K/48K the ULA handled the address decoding for the ROM and ‘lower’ RAM. With 74LSxxx or ZX8401/PCF1306P decoding the “upper” RAM. In the 128K and +2 grey, the PAL 10H8 intercepts the Z80 address lines A14 and A15 and instead sends modified signals “ULA14” and “ULA15” to the ULA.
velesoft and other people have released various configuration details for GAL 16V8 chips to replace the PAL 10H8 to correct some unintended problems, but not, as far as I know, to allow an “all RAM” mode.
See
here and here.
However, I think it should be possible if you want to come up with your own equations and program your own GAL chip.
One thing to remember, and this is the awkward part, is that some of the internal RAM will always be contended, plus the screen memory is always in the same place.
The other problem, is that the +2A/+2B/+3 machines have double the amount of ROM, some of this extra ROM contains the disk system code. And the +2A/+2B edge-connector has some extra disk controller related signals, these are not present on the 128K or the +2 grey. See the wiki for details.
Both these problems can be overcome (assuming the +3 compatible disk interface was designed for use with a +2A/+2B). But it does mean more glue logic.
Mark
Some existing interfaces/expansions can already do some of this (DivIDE, DivMMC, ZXMMC, Spectranet and maybe others, although not all are able to provide true read/write RAM access across the whole ROM space).
If you want an internal modification, then either piggyback the SRAM chip on the ROM chip, or use a PCB to grab the necessary address and data lines from the Z80 socket. You will still need the glue logic.
In theory, for the 128K and +2 grey, you could also use the existing DRAM. But that may require modifications to the board. As the address decoding is split between IC1 (ULA), IC27/IC10 (ZX8401/PCF1306P/40058) and IC29/IC7 (10H8 PAL).
In the 16K/48K the ULA handled the address decoding for the ROM and ‘lower’ RAM. With 74LSxxx or ZX8401/PCF1306P decoding the “upper” RAM. In the 128K and +2 grey, the PAL 10H8 intercepts the Z80 address lines A14 and A15 and instead sends modified signals “ULA14” and “ULA15” to the ULA.
velesoft and other people have released various configuration details for GAL 16V8 chips to replace the PAL 10H8 to correct some unintended problems, but not, as far as I know, to allow an “all RAM” mode.
See
here and here.
However, I think it should be possible if you want to come up with your own equations and program your own GAL chip.
One thing to remember, and this is the awkward part, is that some of the internal RAM will always be contended, plus the screen memory is always in the same place.
The other problem, is that the +2A/+2B/+3 machines have double the amount of ROM, some of this extra ROM contains the disk system code. And the +2A/+2B edge-connector has some extra disk controller related signals, these are not present on the 128K or the +2 grey. See the wiki for details.
Both these problems can be overcome (assuming the +3 compatible disk interface was designed for use with a +2A/+2B). But it does mean more glue logic.
Mark
ZX81 Variations
ZX81 Chip Pin-outs
ZX81 Video Transistor Buffer Amp
Standby alert
There are four lights!
Step up to red alert. Sir, are you absolutely sure? It does mean changing the bulb
Looking forward to summer later in the year.
ZX81 Chip Pin-outs
ZX81 Video Transistor Buffer Amp
Standby alert There are four lights!
Step up to red alert. Sir, are you absolutely sure? It does mean changing the bulb
Looking forward to summer later in the year.
Re: Is it possible to add All-RAM to a +2?
Yes, it's designed for +2A/+2B
In theory, there is no difference between theory and practice. But, in practice, there is.
Re: Is it possible to add All-RAM to a +2?
It can be done, see "allram.pdf" from this link (it is for Harlequin 128 issue 3H but can modify for ZX +2)
https://onedrive.live.com/?id=E0ADBB58A ... 58ADB8D869
If you don't want allram mode, just only need to use zx +2 with floppy disk interface it will more easy
https://onedrive.live.com/?id=E0ADBB58A ... 58ADB8D869
If you don't want allram mode, just only need to use zx +2 with floppy disk interface it will more easy