Minstrel 3, WRX, UDG and CHR$128

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Mustermann
Posts: 34
Joined: Sun Dec 22, 2019 12:09 pm
Location: Augsburg, Germany

Minstrel 3, WRX, UDG and CHR$128

Post by Mustermann »

From the beginning Minstrel is able to run:
- Low res graphic(e.g. 3D Monster Maze, 3DMonsterMaze.p)
- Pseudo hi res graphic(e.g. Manic Miner, manic.p)
- WRX hi res graphic(e.g. Space Invaders , invaders.p)

but not
- UDG hi res graphic(e.g. Breakout, breakout.p)
- CHR$128 hi res graphic(e.g. Panic HR, panicohr.p)

I am able to confirm all of that.

Next challenge is enabling UDG and CHR$128. Challenge accepted.

Step 1 UDG:

Based on that article
viewtopic.php?t=1514
I cut CPU_A0 to CPU_A8 legs at RAM chip and connected them to ROM_A0 to ROM_A8.
I also cut CPU_A9 leg at RAM and connected it to the corresponding pin at ROM. This doesn't have any effect yet but will be necessary for CHR$128.

My expectation was:
- Low res graphics work
- Pseudo hi res graphics work
- WRX hi res graphics will no longer work
- UDG hi res graphic work
- CHR$128 hi res graphic partially work with half of the characters

Result:
- Minstrel still alive ;)
- Low res graphics work :)
- Pseudo hi res graphics work :)
- UDG hi res graphic work :D
- CHR$128 hi res graphic partially work with half of the characters :D
- WRX hi res graphic STILL WORK :o :o :o

I am happy being able to run UDG hi res graphics games now.
But I am totally confused, why WRX graphics still work.

My under standing was, that UDG is reading graphics from RAM in RFSH cycle using line counter and data from character table, same as operating system is does from ROM.

WRX is reading graphic from RAM in RFSH cycle using I and R register addressing RAM.
I do not have any clue why this may work after I connected A0-A8 RAM address lines to ROM address generator.

Is anyone able to guess why this is working?

Confused Max
Attachments
Invaders.jpg
panic.jpg
Breakout.jpg
ZX81 issue 1 near to original state
ZX81 issue 1 56k internal ram with battery backup, UDG, CHR$128 and WRX enabled
Minstrel 3 ZX81 clone 64k with battery backup, UDG, CHR$128 and WRX enabled

nollkolltroll
Posts: 293
Joined: Sat Sep 27, 2014 8:02 pm
Location: Stockholm, Sweden

Re: Minstrel 3, WRX, UDG and CHR$128

Post by nollkolltroll »

A very nice mod, with an exciting future. Will stay tuned.
/Adam

Mustermann
Posts: 34
Joined: Sun Dec 22, 2019 12:09 pm
Location: Augsburg, Germany

Re: Minstrel 3, WRX, UDG and CHR$128

Post by Mustermann »

I was able to demystify the WRX miracle.
It had been an layer 8 error(located between my ears).

All of the programs I used for testing WRX

invaders.p
pacman,p
Against_The_Elements (Paul Farrow 2016) [V1-01].p

were pseudo HRG programs in actual fact.

So I searched around for real WRX programs and found

weedkill.p
hero.p

Both of them loaded, but brought only weird signs to the screen(as expected for WRX after my mod).

So my expectation is meet:
- Low res graphics work
- Pseudo hi res graphics work
- WRX hi res graphics doesl no longer work
- UDG hi res graphic work
- CHR$128 hi res graphic partially work with half of the characters

Next step on t<my list is CHR$128

After implementing another mod now I am able to run CHR$128 as well.

Tested with
3DMaze.p

When schematic is drawn, I will tell how to do that.

Max
Attachments
3DMaze.jpg
ZX81 issue 1 near to original state
ZX81 issue 1 56k internal ram with battery backup, UDG, CHR$128 and WRX enabled
Minstrel 3 ZX81 clone 64k with battery backup, UDG, CHR$128 and WRX enabled

Mustermann
Posts: 34
Joined: Sun Dec 22, 2019 12:09 pm
Location: Augsburg, Germany

Re: Minstrel 3, WRX, UDG and CHR$128

Post by Mustermann »

Step 2 CHR$128:

In the first step I already implemented UDG capability into MInstrel 3.

So what is the difference between UDG and CHR$128?

Both are using customized character-sets located in RAM. Within RFSH cycle both are building pattern address based on line counter and character in DFILE. UDG is using one characterset as ROM does, CHR$128 is using two of them.

UDG is using A0-A8 to do so. CHR$128 is using A0-A9 to be able to address two character-sets.

The central question is; How to generate A9 in RFSH cycle?

I found information about that in an article about TK85 of Kelly Murta
http://zx81.eu5.org/chr128.html
and the build instructions of ZX97lite of WIlf RIgter
http://www.user.dccnet.com/wrigter/inde ... 97lite.htm

Both of them propose to make A9 out of INVERT bit of the Character.
ZX81 is keeping characters in DFILE. Bit 0-5 are naming the character, Bit 6 is ending character generation. Bit 7 say if the character is inverted(white on black) or normal(black on white)

Both articles are telling that lowest bit of I Register can be used to distinguish between CHR$128 and standard mode.
This bit is not used and set to 0 in standard mode but can be set to 1 to enable CHR$128 mode.
This bit is visible on A8 line in RFSH cycle. It is masked by bit 5 of the character so using standard hardware it is unused.

A8 is accessible at CPU. In the original ZX81 INVERT is hidden inside of the ULA. The Minstrel 3 design make this information accessible as the TK85 and ZX9zlite does.
INVERT can be found at pin 12 of IC15 at Minstrel 3

Kelly proposed to use NOT(A8 AND INVERT) for A9 in RFSH cycle.
WIlf propose to use A8 AND INVERT for A9 in RFSH cycle.

I tested both of them and A8 AND INVERT worked for me.
But I wasn't complete satisfied about that.
A8 AND INVERT was ok for all CHR$128 programs. In case of not using CHR$128(A8=0) the A9 line will always be 0. This work for many programs but not all. Especially when using a copy of ROM in RAM CHR$128 is disabled, so A8=0 and A9=0 as well. This does not match the position of character pattern in ROM($1E00 that has Bit 9=1)

So I propose to use A9 in standard mode and INVERT in CHR$128 mode. This can be done by (A9 AND (NOT A8)) OR (INVERT AND A8)

I implemented that with one additional 74 HC257(IC_N1) soldered on the back of IC14 to create A9 for RAM chip. I cut the A9 leg at RAM and connected it to the output, RFSH to select A9 to the input used at any non RFSH cycle and (A9 AND (NOT A8)) OR (INVERT AND A8) at the second input.

To implement (A9 AND (NOT A8)) OR (INVERT AND A8) I chose an 74HC 251(IC_N2). In case A8 is low, selector(IC_N1) is connected to A9. In case of A8 is high selector(IC_N1) is connected to INVERT.

This work for me.

So now I am able to run UDG and CHR$128 programs :D on Minstrel 3 but not WRX programs :|

Happy Max
Attachments
CHR$128.jpg
Panic_1.jpg
3DMaze.jpg
Last edited by Mustermann on Sun Mar 15, 2020 10:13 pm, edited 1 time in total.
ZX81 issue 1 near to original state
ZX81 issue 1 56k internal ram with battery backup, UDG, CHR$128 and WRX enabled
Minstrel 3 ZX81 clone 64k with battery backup, UDG, CHR$128 and WRX enabled

Mustermann
Posts: 34
Joined: Sun Dec 22, 2019 12:09 pm
Location: Augsburg, Germany

Re: Minstrel 3, WRX, UDG and CHR$128

Post by Mustermann »

Best of both worlds (WRX and UDG) !

As you may know WRX HRG is using CPU addressing in RAM with I and R Register as pointer to High res data.

UDG and CHR$128 use a combination of a line counter and the content of DFILE to address character pattern in RAM.

Both are not compatible to each other. So original Minstrel 3 is not able to run UDG and after my modification I am no longer able to run WRX high res graphic.

I noticed that many(if not all) UDG enabled programs use pattern file in 8k-16k area. WRX programs I know do use graphic file above 16k.

So how about using UDG addressing below 16k and WRX above?

Minstrel 3 is switching between CPU address lines and CHR address generator using IC14, IC20 and IC21. In case /RFSH = 1 output is connected to CPU address lines, in case of /RFSH = 0 (RFSH cycle) output is conenected to address generator.

As my RAM is connected to that as well it is UDG enabled. For WRX we need CPU address lines in RFSH cycle as well.

So I build a selector that feed IC14, IC20 and IC21 with /RFSH in 0k-16k and always 1 in 16k-64k area.

This causes some problem with Latch Enable and (MREQ or RFSH). So I kept IC14 connected to /RFSH and used the additional one that I added for CHR$128 to handle A8 as well.

At the end I succeeded :D :D :D

UDG and CHR$128 are working in ROM and 8k-16k area. WRX work all above 16k.

UDG and WRX.jpg

Yeah!

Max
ZX81 issue 1 near to original state
ZX81 issue 1 56k internal ram with battery backup, UDG, CHR$128 and WRX enabled
Minstrel 3 ZX81 clone 64k with battery backup, UDG, CHR$128 and WRX enabled

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siggi
Posts: 913
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Location: Dauernheim, Germany
Contact:

Re: Minstrel 3, WRX, UDG and CHR$128

Post by siggi »

Mustermann wrote:
Sat Mar 14, 2020 5:36 pm
WRX programs I know do use graphic file above 16k.
So you don't know this programs:

http://www.pictureviewerpro.com/hosting/zx81/fredn.htm

Siggi
My ZX81 web-server: online since 2007
http://zx81-siggi.endoftheinternet.org/index.html

Mustermann
Posts: 34
Joined: Sun Dec 22, 2019 12:09 pm
Location: Augsburg, Germany

Re: Minstrel 3, WRX, UDG and CHR$128

Post by Mustermann »

Thank you Siggi for that hint.

I had seen that page, but didn't notice that these programs need WRX RAM between 8-16k.

I checked Dungeons of Ymir and Invaders from Fred's page and both gave me puzzled signs.

So it seems that it is impossible to run all with one configuration.

I will add a jumper to switch 8-16k between WRX and UDG RAM.


UDG and WRX 2.jpg


Do you know any UDG or CHR$128 program that need its character table above 16k?

Max
ZX81 issue 1 near to original state
ZX81 issue 1 56k internal ram with battery backup, UDG, CHR$128 and WRX enabled
Minstrel 3 ZX81 clone 64k with battery backup, UDG, CHR$128 and WRX enabled

Mustermann
Posts: 34
Joined: Sun Dec 22, 2019 12:09 pm
Location: Augsburg, Germany

Re: Minstrel 3, WRX, UDG and CHR$128

Post by Mustermann »

Jumper implemented.

In general I am able to switch 8-16k area now between WRX and UDG RAM.
Dungeons of Ymir andf Invaders are loading now,

Unfortunately they REALY need entire 8-16k so they are not compatible with my Vdrive2 driver(residing at write protected 8-10k).

I assume that I will proof them working, but not play them so much(even if Dungeons of Ymir is a great game).

Max
Attachments
Ymir_1.jpg
Invadr_1.jpg
ZX81 issue 1 near to original state
ZX81 issue 1 56k internal ram with battery backup, UDG, CHR$128 and WRX enabled
Minstrel 3 ZX81 clone 64k with battery backup, UDG, CHR$128 and WRX enabled

User avatar
1024MAK
Posts: 3001
Joined: Mon Sep 26, 2011 10:56 am
Location: Looking forward to summer in Somerset, UK...

Re: Minstrel 3, WRX, UDG and CHR$128

Post by 1024MAK »

Wow!

Any chance of some photos of you Minstrel 3 board now it is stuffed full of modifications and upgrades?

Mark

Mustermann
Posts: 34
Joined: Sun Dec 22, 2019 12:09 pm
Location: Augsburg, Germany

Re: Minstrel 3, WRX, UDG and CHR$128

Post by Mustermann »

I can do that if you like.
There were 8 additional chips at the board and 2 additional at the Vdrive2 adapter needed.

Final state.jpg
Front.jpg
Left.jpg
With Vdrive2.jpg

This is the output of Vdrive2 info. You may notice changed character set. I copied ROM to RAM and replaced number characters.

Vdrive2.jpg
Max
ZX81 issue 1 near to original state
ZX81 issue 1 56k internal ram with battery backup, UDG, CHR$128 and WRX enabled
Minstrel 3 ZX81 clone 64k with battery backup, UDG, CHR$128 and WRX enabled

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