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Re: ULA 'TAPE IN' Expected Voltages?

Posted: Wed May 24, 2023 2:44 pm
by Flatulentia
I have a bird's nest prototype up and running external to the ZX81 driving a dummy load.

Regardless of input voltage swing, the output never exceeds a 0V to +4.6V range. Inputs above ~400mV pk-pk produce a full-range output swing becoming progressively more square as the amplitude increases with no signs of any unpleasantness in the output. Amplifier bandwidth is sufficiently flat and wide to avoid frequency-related amplitude change and phase shift, so fast-load content should work fine.

I guess the TAPE IN pin should like this signal, so I'll build a perf-board version soon and see how it behaves inside the ZX81.

Re: ULA 'TAPE IN' Expected Voltages?

Posted: Thu May 25, 2023 6:35 pm
by Flatulentia
I've had partial success so far by replacing C10 and R33 with an AC-coupled x10 amplifier running from the internal +5V rail. I've also replaced R34 (200R) with a 68K. The combined effect is that the EAR socket now appears to the outside world as something closer to a standard consumer-level 'Line In' which is more useful to me.

Any attempts on my part to otherwise process the signal (level shifting, clamping, Schmitting, etc) to make it closer to what I'd expect the TAPE IN pin to like have only resulted in making it more deaf so far, so I've given up on that for now.

That's it for now. I'll report back if I ever get any closer to finding out what the TAPE IN pin actually wants.


EDIT: Schematic withdrawn by me as it's probably not going to work entirely correctly.

Re: ULA 'TAPE IN' Expected Voltages?

Posted: Thu May 25, 2023 9:00 pm
by 1024MAK
It comes down to how the code in the LOAD routine “sees” the signal.

For more information, have a look at these web sites:
Data Storage on Cassette Tape

ZX81 ROM disassembly, search for “THE 'LOAD COMMAND' ROUTINE”
Archive of original web site that has a disassembly of the ZX81 ROM

The same but held on a currently available web site

The book ‘The Complete Timex TS1000 / Sinclair ZX81 ROM Disassembly’

From zxdocs
Bits and Bytes
Each byte consists of 8 bits (MSB first) without any start and stop bits, directly followed by the next byte. A "0" bit consists of four high pulses, a "1" bit of nine pulses, either one followed by a silence period.
0: /\/\/\/\________
1: /\/\/\/\/\/\/\/\/\________
Each pulse is split into a 150us High period, and 150us Low period. The duration of the silence between each bit is 1300us. The baud rate is thus 400 bps (for a "0" filled area) downto 250 bps (for a "1" filled area). Average medium transfer rate is approx. 307 bps (38 bytes/sec) for files that contain 50% of "0" and "1" bits each.
There may be some better discussions or descriptions, but I have not found them so far!

Mark

Re: ULA 'TAPE IN' Expected Voltages?

Posted: Thu May 25, 2023 11:52 pm
by Flatulentia
What's throwing me is how to translate this in to what the TAPE IN pin wants to see in terms of voltage levels.

ZX81 Tape Format.png

If I feed a WAV file created in Audacity straight into the TAPE IN pin via a 4K7 resistor, I get no response at any amplitude within TTL voltage limits measuring directly at the pin. If I AC-couple the signal as in the original input circuit so the signal can swing negative then it works, but only over an incredibly narrow range of voltages.

Given a pristine source signal, I was hoping that anything below a certain threshold voltage would be reliably seen as a '0', and anything above a certain threshold voltage would be reliably seen as a '1', but that's not what's happening here.

I'm beginning to wonder if this ULA may be faulty as my original kit-built ZX81 with the same ULA revision seemed happy to load from a wide variety of sources over a fairly wide voltage range. I used to wonder what all the fuss was about when others complained about unreliable loading.

I bought this ZX81 over 20 years ago and it's always been a very fussy loader, so this isn't something I've brought on with my recent proddings. Maybe the previous owner loaded via a power amplifier and damaged it with excessive voltage swing? Who knows?

I've gone over it several times now checking for wrong value or faulty components that might affect loading but, apart from finding that all of the original 47nF decoupling caps were doing a lousy job and replacing them with modern X7R equivalents, I've found nothing.

This is the only ZX81 I have, so I don't have another to directly compare it to unfortunately.

Re: ULA 'TAPE IN' Expected Voltages?

Posted: Fri May 26, 2023 12:46 am
by TMAOne
This discussion reminds me of the last meeting of our retro computer club. Several of us brought in ZX81/TS1000's, and many reported that they couldn't load or save programs. Ever.

The "solution" in these cases turned out to be embarrassingly simple.

The fellows felt intuitively that the "Mic" port would be the input to the computer, and the one labelled "Ear" would be the output. I can see their logic, but that's not the way Clive saw it. He felt it was more intuitive to label the jacks to match the labels on the tape recorder.

Which is "more logical" just depends on how you initially look at it.

Then again, on this side of the pond we drive on the right side of the road, too. :)

Anyway, so I've "solved" the issue for no less than 3 frustrated people now. Not saying that's the situation here at all, and I don't mean to insult anyone, but sometimes these posts get read by folks searching for answers that are just "too obvious" to be considered by the good folks here.

Re: ULA 'TAPE IN' Expected Voltages?

Posted: Fri May 26, 2023 1:06 am
by Flatulentia
Point well made and well worth making, so no offence taken.

I wish it was this simple in my case.


EDIT: Just to clarify my last post, I do understand that 4 cycles represent a '0' and 9 cycles represent a '1'. The '0' and '1' I'm referring to are the voltage thresholds that determine whereabouts in the cycle's amplitude TAPE IN does its measuring to count the cycles.

I'm beginning to wonder if the pin behaves in a completely different manner to the way I think it does. That would explain why I seem to have very little control over what it's doing with the methods I'm trying. It would also explain why I can't find a definitive answer on expected voltage levels if I'm actually asking the wrong question.

Re: ULA 'TAPE IN' Expected Voltages?

Posted: Fri May 26, 2023 4:27 am
by blittled
I'm not sure if this will help but I've experimented with developing a SD card reader with microcontrollers (Arduino Due and Parallax's Propeller) and converted the data to a bit stream that used the same timings as the cassette format. Both use 3.3V logic to create the pulses and I never had any issues with loading a program into a ZX81.

Re: ULA 'TAPE IN' Expected Voltages?

Posted: Fri May 26, 2023 10:38 am
by Flatulentia
The timings should be spot on as the files I'm testing with are all digitally generated from .p files. I think my problem lies elsewhere, but I will double check though.

One question springs to mind: Are you injecting the 3V3 logic level pulses directly in to the TAPE IN pin or via a series capacitor/resistor network as in the original schematic?

The answer to this question will help me determine exactly what the TAPE IN pin expects to see and whether or not my problem is likely a damaged ULA.

Thank you.

Re: ULA 'TAPE IN' Expected Voltages?

Posted: Fri May 26, 2023 1:59 pm
by blittled
Yes, I'm generating a digital pulse on a generic i/O pin to the Tape In pin of an unmodified ZX81.

Re: ULA 'TAPE IN' Expected Voltages?

Posted: Fri May 26, 2023 3:29 pm
by Flatulentia
Thanks for clarifying. That's really helpful as I think I may understand what's happening with mine now. I'll go away and have another think.