ZX81 ULA-in-a-CPLD

Any discussions related to the creation of new hardware or software for the ZX80 or ZX81
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Andy Rea
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Re: ZX81 ULA-in-a-CPLD

Post by Andy Rea »

well the ferrite bead i tried ddin't seem to do much i suspect its optimal ac rejection is at a much higher frequency that the noise we have in the zx81.
that was one of these... http://www.farnell.com/datasheets/16859 ... u8QAvD_BwE

however i am tempted to get a few of these to try out http://www.farnell.com/datasheets/15003 ... u8QAvD_BwE

i don't really know much about how ferrites work but these are marketed as lower frequency so i might as well give it a go.

regards Andy
what's that Smell.... smells like fresh flux and solder fumes...
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PokeMon
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Re: ZX81 ULA-in-a-CPLD

Post by PokeMon »

Be aware how you realize the transistor amp. If this is just an emitter follower, than the shit comes out of the CPLD already. Anything you do at the 5V or second video power supply rail will have no effect. ;)
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Andy Rea
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Re: ZX81 ULA-in-a-CPLD

Post by Andy Rea »

yes i am finding this out the hard way.... i have made a crazy circuit now from 3 transistors, first two invert the signal coming from cpld but the have been made into schokkty transistors by adding schokkty diode between base and collector this stop them going into saturation so switch off times are fast. by doing this the signal from cpld is cleaned these 2 signals are now mixed and emitter followed. the result is best i have so far but it it too much circuitry for my board... which is a mere 2inch by 0.7inch same size as the socket

maybe i use a sot-23 dual inverter / buffer that will do same job but save on pcb space.

regards.
what's that Smell.... smells like fresh flux and solder fumes...
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Andy Rea
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Re: ZX81 ULA-in-a-CPLD

Post by Andy Rea »

few pictures top one is LCD tv, the next ones are crt colour tv

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turn a normal transostor into a schottky transistor :)
you know times are changing when you prototype with SMD instead of TH and a breadboard !
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back
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emmiter follower same as circuit posted above in Andy-cam (R)
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and here we find the rare purple ula in the wild...
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what's that Smell.... smells like fresh flux and solder fumes...
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PokeMon
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Re: ZX81 ULA-in-a-CPLD

Post by PokeMon »

Andy Rea wrote: Thu Mar 22, 2018 11:08 pm maybe i use a sot-23 dual inverter / buffer that will do same job but save on pcb space.
Yes - that's the best. Get your digital video and sync to these and mix together after.
Take this sot 23-6 device 74LVC1G14 for example.
https://assets.nexperia.com/documents/d ... VC2G14.pdf
Maybe you don't even need a separate power rail - should give clean result also, I think.
The most spikes come from "internal traffic" inside the CPLD.

You need just 2 resistors for a 75R compatible output - the drivers are strong enough to drive this load (up to 32mA).
You don't need the back porch stuff - this is approved circuitry from the ZX8CCB board and give clean results.
Bildschirmfoto 2018-03-23 um 01.41.22.png
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PokeMon
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Re: ZX81 ULA-in-a-CPLD

Post by PokeMon »

By the way - I changed R5 to 150R long time ago, didn't update the schematics.
R6 stays still 390R.
Together with 75R load gives about 1Vpp Video at the output.
No need for any decoupling capacitors or short circuit protection.
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Andy Rea
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Re: ZX81 ULA-in-a-CPLD

Post by Andy Rea »

Thanks for the heads up Karl, I'll get hold of a couple of those 74lv things ( technical or what :) ) and take it from there.

Regards Andy
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McKlaud
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Re: ZX81 ULA-in-a-CPLD

Post by McKlaud »

@Karl: thanks for a hint. :idea: I will go for a dual non-inverting Schmitt-trigger IC like 74LVC2G17 made by Nexperia. These units can source/sink up to 50mA. :geek:
Claudius
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PokeMon
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Re: ZX81 ULA-in-a-CPLD

Post by PokeMon »

Yes I like these "little logic" gate series. The LVC (low voltage cmos) are fast and powerful. No need for transistors.
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Re: ZX81 ULA-in-a-CPLD

Post by Andy Rea »

I have changed the logic around the video cycles, so now the data bus ( for character code capture ) is sampled a 1/4 clock cycle from the rising edge of T3 and the nop-window started, then if conditions allow a nop will be forced onto the data bus ( not forcing D6 ) if at the riding edge of T3 the force nop is in place then a full video cycle occurs and alternate address is forced until the falling edge of T4 when the video data is also loaded into the shift register.

it is working, and uses 1 less register than the older design :)

regards Andy
what's that Smell.... smells like fresh flux and solder fumes...
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