Re: ZX81 ULA-in-a-CPLD
Posted: Sat Dec 03, 2016 1:28 am
PokeMon,
I love your avatar, it makes me feel like life is in a cartoon and why should it not be with backup, that said, I took heed of your post and went for the hsync generator, starting at 200 counts and ending somewhere around 207 one step at a time. This cleared the zig zag on the top right hand corner of the screen and almost cleared the phasing error on the inverted 'K' but for one scan line out. I will attempt further experimentation tomorrow.
I just want to make it clear about this whole cpld thing, I found Retrotechie's design 3 years ago, I happen to be reading this thread from the begining and found out Retrotechies compiler uses schematic entry, mine uses digital/boolean equations only so I went from schematic to equations.I think equations are better because the end user has the option to make fine adjustments(tweeking).
I love your avatar, it makes me feel like life is in a cartoon and why should it not be with backup, that said, I took heed of your post and went for the hsync generator, starting at 200 counts and ending somewhere around 207 one step at a time. This cleared the zig zag on the top right hand corner of the screen and almost cleared the phasing error on the inverted 'K' but for one scan line out. I will attempt further experimentation tomorrow.
I just want to make it clear about this whole cpld thing, I found Retrotechie's design 3 years ago, I happen to be reading this thread from the begining and found out Retrotechies compiler uses schematic entry, mine uses digital/boolean equations only so I went from schematic to equations.I think equations are better because the end user has the option to make fine adjustments(tweeking).