I want UDG !

Discussions about Sinclair ZX80 and ZX81 Hardware
Rishi
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I want UDG !

Post by Rishi »

I want UDG ! my motivations are simple, it exist, it is low access programming wise, there are games that have been written for it, and as far as i understand it is fast (but correct me if i'm wrong, i figure in HiRes modes, at some point the CPU is executing NOP's, that is a waste of time isn't it ? )
So how could it be done, reading up on it, 2 different approaches are used, internal and external, either way would be an option, i would even consider putting an extra RAM-chip on the board if that would work or help, Internally the separation between the A0-A8 and A0' and A8' isn't quite clear to me, why was it done that way to begin with ? The explanations i found are very brief and written by someone who is clearly not a fan. Maybe there have been some topics about it before i'll scrounge the forum (i actually forgot to do that) :oops: But any help is always appreciated.
32K SRAM WRX compatible, 32Bit IO-Port, ROM Ghost, ZX-Printer.
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1024MAK
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Re: I want UDG !

Post by 1024MAK »

Whenever the screen is being drawn with data for display, it is the Z80 (with help from the ULA) that is doing it. So for all the time that an image is being drawn, the Z80 is not available to execute "user" code.

The lower address lines have to be separated by resistors so that the display system can work. Keep in mind for normal Z80 reads and writes, the address and data busses work as per a normal Z80 computer. But when the ZX81 is generating a display, the ULA grabs the data from the data bus and then takes over the data bus and feeds the Z80 a NOP. Having got the character code from the RAM, the ULA then uses this information along with a line counter to address the bit pattern for the character from the ROM. The data byte from the ROM (a bit pattern for the first horizontal line of the character) is then read by the ULA. The ULA then converts this parallel data byte into a serial bit stream at 6.5MHz, and sends it to the TV as a composite video signal. As this is happening, the Z80 reads the next instruction, and reads the next character. Until the end of the line. Then the whole process repeats, but for the next display line of the same characters until all eight lines have been displayed. Then the Z80 starts on the next line of characters in the display file...

Mark

PS, it is very easy to get confused. If you want to see how complex this simple computer really is, go study a ZX80 schematic.
ZX81 Variations
ZX81 Chip Pin-outs
ZX81 Video Transistor Buffer Amp

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Rishi
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Re: I want UDG !

Post by Rishi »

I found some topics, I realize also about the speed thing i must be wrong, the Z80 anyway executes these NOP's
viewtopic.php?f=6&t=526&start=10
and the reference to this
http://www.user.dccnet.com/wrigter/inde ... CHR$X4.htm
thinking about it today, i realize, that not so much storing a characterset in memory or getting the ZX81 to read from a specific location is a problem (with Wilf info i can do the latter without to much hassle) but doing both to the same RAM chip might turn out to be a tad more tricky, are resistors really enough to separate the the Address bus from the Tri-state flip-flop's ? and would i be better off using a separate Ram chip anyway ?
32K SRAM WRX compatible, 32Bit IO-Port, ROM Ghost, ZX-Printer.
dr beep
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Re: I want UDG !

Post by dr beep »

Rishi wrote:I want UDG ! my motivations are simple, it exist, it is low access programming wise, there are games that have been written for it, and as far as i understand it is fast (but correct me if i'm wrong, i figure in HiRes modes, at some point the CPU is executing NOP's, that is a waste of time isn't it ? )
So how could it be done, reading up on it, 2 different approaches are used, internal and external, either way would be an option, i would even consider putting an extra RAM-chip on the board if that would work or help, Internally the separation between the A0-A8 and A0' and A8' isn't quite clear to me, why was it done that way to begin with ? The explanations i found are very brief and written by someone who is clearly not a fan. Maybe there have been some topics about it before i'll scrounge the forum (i actually forgot to do that) :oops: But any help is always appreciated.
Like Wilf Rigter 1K hires routine you could write a routine that will print UDG or normal character. Just stay in hiresmode until break, then back to lowres.
Rishi
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Re: I want UDG !

Post by Rishi »

I was looking at this as a non-volatile SRAM, a tad pricy though.
http://pdf.datasheetcatalog.com/datashe ... 00-IND.pdf

also i was wondering if i could recycle some of the 4116's that are in a Memopak i bought (which started the whole thing :o ) i am anyway considering re-using the box and edge-connector to make another 32K SRAM for a friend of mine. How hard is it to use the 4116's i am actually fairly sure all 16 of 'm are still ok, but there is something else wrong with the memopak causing a strange video pattern. I just don't like throwing stuff away, particularly semiconductors are not recycle-able unless as parts. (if you melt the stuff you get left with a non usable mixture of metal and silicate :( )
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RetroTechie
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Re: I want UDG !

Post by RetroTechie »

Rishi wrote:Internally the separation between the A0-A8 and A0' and A8' isn't quite clear to me, why was it done that way to begin with ?
When the Z80 'executes the display file', pixel data that's sent serially to the screen, is grabbed from the data bus during Z80 refresh period. During that time, the Z80 has contents of I register on its high order address lines (A8-A15). So programmers can decide which memory area the pixel data comes from, by fiddling with the Z80 Interrupt register. Which is what you'll see in any display routine that puts something other than standard ZX81 character set on screen.

The lower order address lines (A0-A7) serve to select "which character?" from the ROM area that has the pixel data. But during refresh, Z80 has contents of R register on those lines. Which isn't useful for determining which character to display, since it's auto-incremented (+1) on each NOP+refresh cycle.

Those resistors allow the ULA to override the contents of the lower address lines (right before the pixel data is grabbed). What does the ULA put on those address lines? The character code that was grabbed earlier from the data bus during the Z80 instruction fetch that came before the refresh. And what 'instruction' was fetched? A character code from the display file! :idea: (screen line within character (0-7) goes onto A0'-A2'). But immediately after, ULA forces the data lines low, so the Z80 sees and executes NOPs instead.

For clarity: the ULA doesn't care whether Z80's I register points to an area in ROM, or an area in RAM. That's the programmer's problem... :mrgreen:

Likewise, the ULA doesn't care what pixel data it grabs, or whether it comes from ROM, RAM, or a floating data bus. But there IS a difference there: if it came from the internal ROM, the lower address lines were set by the ULA (A0'-A8' over-ridden since 'behind' the resistors). If it came from RAM (or some external memory), the lower address lines were set by the Z80 (!, not over-ridden by the ULA since RAM A0-A8 are 'before' the resistors).

So you'll see that what pixels actually end up on screen, is a very, very intricate 'dance' between ULA, Z80, software, and the ROM/RAM memory layout. Again: as soon as you modify standard ZX81 display routine, what happens is the programmer's problem. :shock:
also i was wondering if i could recycle some of the 4116's (..)
Unless you like pain, "because I can", or meant to provide 'public value' (like: show a machine in a museum, that both works and uses actual 16K*1 chips): no point whatsoever imho. Something along the lines of "Total Cost of Ownership" (or in other words: simply not worth the trouble).
A static RAM, 64K*1 or even 16K*4 DRAMs (4416 type) are ALL better options than those nasty 4116 chips. Save those for a museum if you want. :lol: Especially given the low cost of replacement chips, and how -relatively- easy it is to hook them up.
Rishi
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Re: I want UDG !

Post by Rishi »

Thank you, well by now i am looking at just wiring it into my RAM-pack, i was having some trouble with how to physically manage this until last night i realized that if i can't go left or right i could still go up ! meaning i could take 2x 28pin IC-feet, separate them with some lose IC-foot bits, and put resistors to connect the lower Address lines. and tap the address selection system above that. The address selection system as it is demonstrated here:
http://www.user.dccnet.com/wrigter/inde ... CHR$X4.htm (sorry this link did not end up correctly in the previous post)
Wilf uses A0-A9 even, but i think the standard ZX81 uses A0-A8 (512 bytes) ah, but since this is made for a completely separate system i am going to have to add something more. Address lines should only be overridden during the Refresh cycle and even though the 74374 is a tri-state this functionallity isn't used in this schematic, and the 74193 isn't a tri-state anyway. so i was thinking to put some line drivers in between as in a 74244 or 74367, driven by the !REFSN, that would make the whole thing 4 chips, or maybe three if i can wiggle the 3rd state into the 74374 and how about a 74569, that is a counter with tri-state. sorry about all the numbers, i am just looking for easy ways (haha..) well compact ways of doing this. The issue of WRX compatibility remains, but i recon i separate the !REFSN to not trigger the UDG address selector above 4000h (i think that is all i'd have to do) Now let's see which chips are readily available over the counter over here. then i can see if i can work out how they work exactly Oh yeah how big are the resistors inside the ZX81 that are used for separating the Address bus , about 10K ?
32K SRAM WRX compatible, 32Bit IO-Port, ROM Ghost, ZX-Printer.
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1024MAK
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Re: I want UDG !

Post by 1024MAK »

Address bus "isolation" / "separation" resistors are 1k.

Mark
ZX81 Variations
ZX81 Chip Pin-outs
ZX81 Video Transistor Buffer Amp

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Rishi
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Re: I want UDG !

Post by Rishi »

Oh great, well since technically speaking these extra ones will be added parallel since i am not planning to disable the ULA connection to the ROM (i can't reallu software wise) i will try to maximize their value and the RAM still working, i don't want to have to much current running on the address bus. 10K would mean an overall reduction with 10% which probably won't damage the Z80 (i could probably even increase the internal ones, most Logic chips work ok with 10k bridges)
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Buka
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Re: I want UDG !

Post by Buka »

Relatively simple refinement for UDG: http://www.timexsinclair.org/unsorted/BestOfSUMThe.pdf

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