Sinclair ZX80 / ZX81 / Z88 Forums

Flatulentia wrote: ↑Sat Jun 03, 2023 11:03 pm

1024MAK wrote: ↑Sat Jun 03, 2023 10:00 pmThe resistor in the other modification is only needed for configurations where you are trying to use battery backup.

I'll correct my saved copy of the schematic then as it says that resistor is for HRG8 and the other one is for battery backup. Thanks.

Both are for battery back-up. The 10kΩ holds /WR high (pin 27)(inactive) if the /WR line is not driven by other circuitry (due to it not being powered) so that there is less likelihood of unwanted writes of random data over the stored wanted data (in the upper half of the SRAM).

Yes, I know that is not what is said on the linked to web page.

Mark

That makes sense. Thanks.

It does indeed look as though commercial producers are following that exact schematic blindly.

So, on this page we have the circuit and details.

The most important part, is that only pins marked with the “triangle” symbol should be bent up or otherwise isolated from the socket. All other pins go in the socket contacts.

Pin 1, A14 has to have some extra circuitry so that the upper part of this SRAM is not always mapped in the top part of the Z80 memory map, that’s why the /M1 signal is compared to address line A15. We only want to allow reading or writing of data from/to the upper half of the SRAM chip, not instruction execution.

When the Z80 is getting instructions from the upper part of its memory map, it should be reading from the display file in the lower half of the SRAM chip. In an unmodified Z80, this is done by incomplete address decoding, hence the (same) RAM appears in more than one place.

Pin 2 goes to A12 from the Z80
Pin 20 is the /RAMCS from the ULA (/CE - /chip enable or /chip select on the SRAM chip)
Pin 22 goes to 0V to make this control pin (/OE - output enable on the SRAM chip) always see it at an active level.
Pin 23 goes to A11 from the Z80
Pin 26 goes to A13 from the Z80
pin 27 is the /WR line from the Z80. It needs to be held high to stop unwanted writes, hence the 10kΩ resistor to the battery backed supply to pin 28. Further detail in my earlier post above.
pin 28, when battery backup is wanted, this pin needs isolating from the normal +5V power rail. The diode stops the battery from trying to power up all the other chips, but allows the +5V to power the chip when the computer has power. The 100Ω resistor limits the charging current to the battery.

It’s the ULA’s address decoding on pin 20 that actually allows HRG (indeed any of the high resolution graphics modes generated by software). Hence why an unexpanded, unmodified 1K (or 2K TS1000) can run dr beep’s 1K high-res programs.

All this upgrade does, is replace the smaller capacity SRAM chip with a higher capacity SRAM chip. Plus the extra circuitry to allow 16K of RAM to be used as battery backed data storage in the upper part of the memory map (“48K to 64K”).

I hope that helps to explain it.

Flatulentia wrote: ↑Sun Jun 04, 2023 12:40 am That makes sense. Thanks.

It does indeed look as though commercial producers are following that exact schematic blindly.

That circuit/web page has been online for an eternity…

Mark

It's so much easier reading this as written words than trying to roll it around inside my head. Thank you.

Just a final note on this. The cap has cured the problem but when first switched on from cold the visual issues persist for a few seconds before vanishing.

Just worth noting in case you fit a cap and don’t think it is resolved!

Maybe the capacitor value needs increasing slightly?

I have a big pack of assorted low value ceramic disc capacitors on the way and three ZX81s to play with now so I'll experiment.

Here's a link to the capacitor pack just in case anyone else may be looking for similar...

https://www.ebay.co.uk/itm/265497245428

Thanks for the heads-up.

One other thing springs to mind. I notice from your photo that the RAM IC you used is 55ns. If this capacitor is purely fixing a timing issue then it's probably worth sourcing RAM ICs with a speed closer to the original which I believe is usually at least 120ns?

I have some 85ns 32KB RAM to play with, so it'll be interesting to see if I need a lower value capacitor to fix mine.

I have the same problem with a 32k mod. No WRX hires possible, same wiring but also the 7400 IC for the 32k part.

I tried it with an additional cap 33 - 200 pf GND-RAMCS/ but no success. With 100-200 pF the artifacts are less but still there.

Any hints for me to find the right direction?

What flavour of 7400 did you use? LS? HT? HTC?

I dont know, i think LC. I will report later.

-> I can not identify, the surface is scratched. Will the cap depend on the version?

It's worth checking what speed RAM you used as well while you're looking.

I can't necessarily provide you with a fix, but someone else probably can.