video signal ZX81 old/new version

[PokeMon]

however if the ULA was seeing the HALT signal as low all the time it should not generate forced NOPs on the data bus so a crash would happen very quickly when the cpu started to actually execute video bytes !

I don't think so. Because of an empty DFILE at startup there is only HALT executed and the inverse K Cursor means OR B. So not really code to crash since flag register is saved before executing NMI. And the HALT signal at CPU seem to be correct and not showing crashed a crashed status.

But I think you are right with the point that I get no video pixels. That's the effect. I don't know why HALT is internally shortcutted in ULA and how that can happen and if this is the normal end in the small life of the ULA.

So maybe I wait your new ULA.

[Andy Rea]

yes your right of course, i guess you could partly test this theory by typing some random stuff whilst observing the video output.

Andy

P.S i have a broken newer ULA somewhere if i can find it, but it show a different malfunction to yours, this one does not run code correctly and produces a repeated pattern, but sometimes a different pattern upon a reset.