Memopak : bad RAM chips ?

[Rishi]

Well when i had it on the breadboard, i had !RD directly on the !RD on the RAM, but that didn't work, hence checking to make sure that !RD || !MREQ, both have to go low before the pin on the RAM goes low, and that did work. Any idea why the 1k Hires marble racer didn't work ?

[PokeMon]

Because HRG doesn't work at all if you don't enable RAM during RFSH.
And yes - MREQ has to be used because otherwise any IORQ would read from RAM and write to RAM, too.
Which isn't what you want.
So how do you wire the /WR signal ?
This must be coupled with /MREQ as well (!).
That's why /MREQ is used in conjunction with /CS.

[Rishi]

Yes, yes, of course i think the schematic is somewhere earlier in this thread,
but i mean i tried the 1K Hires in 1K mode, isn't it supposed to work ? or do i need to mod that as well, maybe i misread that somewhere that it just works in 1K.

[PokeMon]

May be - I forget this all the time because I never use really 1k programs or hardware with only 1k for other purposes as testing.

[Rishi]

that was what i was doing, but anyway i'll get back onto the subject later.

[Rishi]

Ok, so found some time to free up one AND-gate, and used it to connect !REFSN && !RD and everything does work, but now i would like to test and see if the HiRes is working. Maybe it's time to start a whole new Topic hmm what sub-index ?

[Rishi]

I thought i'd better post this at the end of this thread as well,
now the schematic looks like this.

0-8K ROM
8-16K Executable code (mirror 40-48K)
16 -32K RAM (mirror 48-64K)
32 -48K Data RAM
48 -64K Mirror to 16-32K
It should be possible to execute code from there, but for now it isn't

[Rishi]

I was just wondering, is it required for all memory to be available, i mean, let's say i connect A15 to !CE which disables RAM above 8000h and no mirror, is that OK, or does there need to be something there ? i was adding another 32K SRAM but i first wanted to make sure the disable works, but connecting it to !RAMCS doesn't seem to work, is that because there is no mirror ? I'm gonna have to try with wiggleling it in with !WR and !RD/!REFSN Trial and Error i suppose...

[RetroTechie]

I'm gonna have to try with wiggleling it in with !WR and !RD/!REFSN Trial and Error i suppose...

Trial & error is a really, really poor method for designing + building logic circuitry. Much better: check out schematics, CAREFULLY read datasheets of ALL IC's used (and in this case: ULA behavior), then go back & forth until you UNDERSTAND what happens at a low level.

Once you "get it", figuring out the logic needed is pretty straightforward (well, usually... ).

For example in that schematic above, I'm 100% certain a bunch of those OR / AND gates can go. Just have a look at schematics of some other ZX81 RAM expansions, and perhaps you'll see what I mean.

[Rishi]

Hmm, I try and look for most Datasheets, had some trouble finding the logic table to the multiplexers though, Also in spite of many good efforts, some of the schematics are rather hard to read. One would actually expect that with all the HiRes capabilties and all they would not be made up out of dashes and crosses, but ok. Particularly disturbing i find though that instead of really helping with solutions there are people that are just saying ''you're doing it wrong '' without actually explaining anything, i've used wires that were to long, to many gates, the wrong ones etc. fortunately there are also people that are really helpful. Of course it would be better to know my objective before i start designing, but since what i want to do and create has changed over time i end up altering what i already have, which makes it worse since then it is already soldered up, rather then on a breadboard where i can still easily change something. A great master once said ''If a child comes with a solution to a math problem, this solution will the child happy, of course his solution will not be as correct as Albert Einstein's but it will please the child simply because it is his solution''