Jupiter Ace - Case Dimensions

Discussions about Sinclair ZX80 and ZX81 Hardware
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1024MAK
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Re: Jupiter Ace - Case Dimensions

Post by 1024MAK » Fri Jan 25, 2019 10:36 am

For the EPROM, I was actually thinking about using a one time programmable AT27C256R-70PU (cost £1.23 / $1.39). Links Farnell Mouser

Mark

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1024MAK
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Re: Jupiter Ace - Case Dimensions

Post by 1024MAK » Fri Jan 25, 2019 10:59 am

There is no advantage in going for a low capacity SRAM chip these days. If you look at suppliers prices, the 32k x 8 bit chips are cheaper than the 8k x 8 bit chips. Mouser USA link, Mouser UK link, RS UK link.

Mark

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Paul
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Re: Jupiter Ace - Case Dimensions

Post by Paul » Fri Jan 25, 2019 11:32 am

1024MAK wrote:
Fri Jan 25, 2019 10:36 am
For the EPROM, I was actually thinking about using a one time programmable AT27C256R-70PU (cost £1.23 / $1.39).

Mark
I always use W27C512. EPROM Compatible flash. Costs less than 1€
10 pcs are 5,06€ free postage from China.
In theory, there is no difference between theory and practice. But, in practice, there is.

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gammaray
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Re: Jupiter Ace - Case Dimensions

Post by gammaray » Sat Jan 26, 2019 3:19 am

Conceptual rearrangement of busses and PCB layout.
CASE AND NEW PCB.jpg
5-TS1000,UK ZX81<-Sheelagh, US ZX81, 2-TS1500/KDLX , 3-TS2040 printer, 2-TS2020 cassette decks, ZXPAND+AY, ZeddyNET, ZXBlast, UDG, ZX8CCB, AERCO, BUILDS/REPAIRS ZX Spectrum, ZX80 Minstrel, ZXMAX48 v1 v2, 2-TS-2068, ROM, 16kRAM

roganjosh
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Re: Jupiter Ace - Case Dimensions

Post by roganjosh » Sat Feb 02, 2019 9:31 am

That looks like a lovely neat idea.

I did a similar thing last year for my ARV1 (Ace Revamped) design but in a much bigger case - a dk'tronics keyboard one. That has the Jupiter Ace circuit with the following changes.
a) ROMs are AT28C64-15 - one at 0-1FFF is essentially the ACE ROMs in one chip, the other at E000-FFFF holds my FORTH extensions etc.
b) RAM is HM6116LP-70 for user/video/character enabling it to run like a standard Ace. Plus one UM61512AK-15 to fill up the rest of
the address space between user RAM and the high address ROM.
c) A couple of 74LS chips to do the additional decoding.
d) A single transistor amplifier on the composite video line.
e) A single transistor driver to allow a Spectrum (post issue 2) beeper to be used.
f) A PIC chip providing an SDHC interface.
g) I needed to hang a little capacitance on the video/character WE line to prevent intermittent screen character corruption.

I wanted it all on one board so it's too much for a Spectrum case but may spark some ideas regarding chip selection.

To fill in a few details the PIC is programmed in assembler to interface directly with both the SDHC voltage shifter/socket board (mounted externally) and the CPU. FAT32 is used. The higher ROM holds the machine code and new FORTH words to access the SDHC. A little later, in case anyone thinks that SDHC isn't fully in the retro spirit, I also designed and built a WD1770 based floppy interface for the expansion bus: the DFS look-and-feel of that is programmed to look similar to the Acorn DFS. I needed to dedicate 1K of RAM for that at the top of memory; the SDHC interface needing no main RAM as the workspace/buffers for that are in the PIC chip.

All the best with your project.

McKlaud
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Re: Jupiter Ace - Case Dimensions

Post by McKlaud » Wed Feb 06, 2019 10:43 pm

Roganjosh: could you please share more information about your SDHC Interface? Reading any more information about your Jupiter ACE would be very interesting.
Claudius
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roganjosh
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Re: Jupiter Ace - Case Dimensions

Post by roganjosh » Thu Feb 07, 2019 9:32 am

I built the SDHC interface using a PIC18F25K40 which is on my main PCB along with all the other standard ACE chips. The interface relies on there being a ROM between e000-ffff to contain the low level code for communication between the Z80 CPU and the PIC, plus the new FORTH words which use that code. It doesn't really need much RAM as it only uses PAD as workspace but it would have been daft not to fill the remaining address space with RAM. The interface between the PIC and the SDHC card is done using a standard SDHC SPI board like this:
sdhc.jpg
sdhc.jpg (18.4 KiB) Viewed 582 times
which is mounted externally and provides for 3V/5V level shifting plus GND, Vcc, Miso, Mosi, Sclk & Cs. There is a corresponding 6 pin SIL header on the main board.

The PIC connects to the ACE circuit using d0-d7, a0-a2, *RD, *WR and *IORQ. The address lines allow selection of the port which, in this case, is coded to 7. If it ever became necessary I could expand the decoded port range rather trivially by using a3 as well.

As for the new FORTH words they are:

LD, SV, BLD, BSV (equivalent to the tape LOAD, SAVE, BLOAD & BSAVE), RM (remove file), LS (list files in the current directory),
MKDIR (create directory), RMDIR (remove empty directory), CWD (change working directory - I'd have called it CD but I use hex almost exclusively), HOME (go to root directory), LDADDR (put most recent load/save address & length on the stack) and SDINIT (used for hot swapping SDHC cards). All are primitives.

Technically I went for minimal chip count so the only specific interface chip is the PIC. It relies on the PIC running at 64MHz which is fast enough for it to be able to poll its control lines and to sequence things at the correct points of the Z80 data sheet timing diagrams. Of course that means that all the code is written in assembler. I suppose I could have written the SPI stuff in C but assembler is more satisfying. Interrupts couldn't be used as they would consume far too many clock cycles and very quickly throw out the timings. The CPU acts as master and the PIC as slave in all communications. All very low-level-hobbyist-dirty. Happily, during development, I never ended up with two chips driving the same control lines at the same time. In part I did it all as a proof of concept.

On the filing system side, FAT32 is used so that data can be transferred to/from a PC. File names are 8.3 short form. The first block of each file acts in the same way as the tape header on an ACE in that it stores sysvars and load/save addresses and lengths. For dictionary loading commands the original ROM code is executed as a last step to ensure (e.g.) that all links are adjusted correctly.

Its pretty zippy too. It loads a 6KB Z80 assembler of mine in a couple of seconds.

That's all I can remember off the top of my head - if anything else occurs to me I'll post another message. I intended posting this sort of information on jupiter-ace.co.uk but, after recent events there, I've held off.
Last edited by roganjosh on Fri Feb 08, 2019 10:54 pm, edited 2 times in total.

McKlaud
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Re: Jupiter Ace - Case Dimensions

Post by McKlaud » Thu Feb 07, 2019 11:15 am

Sounds very Interesting and well done. :) I hope you will share this project soon.
Claudius
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