Sure, I will inform you of my progress. However, let's deal with this situation technically wise. Let's also assume the ROM is okay now, but we have the very same picture.
The TV picture is generated only if the CPU (at least starts) reads ROM and may write to RAM, the later is somewhat being controlled by 8 bit IC5. Right? IC 20 is doing some clock job and address video signal, so it is rather good, its clock is ok (since CPU is working). Assuming that I may conclude that it is IC 21 to blame for the bad picture.
Also, IC 18 and 19 are responsible for synch generation. Also, IC 15 is mixing M1 cycles signal with synch, so it also falls into suspicion.
I am moving in right direction?